BARBARESCHI, MARIO
BARBARESCHI, MARIO
DIPARTIMENTO DI INGEGNERIA ELETTRICA E TECNOLOGIE DELL'INFORMAZIONE
Network traffic analysis using android on a hybrid computing architecture
2013 Barbareschi, Mario; Mazzeo, Antonino; Vespoli, Antonino
Testing 90 nm microcontroller SRAM PUF quality
2015 Barbareschi, Mario; Battista, Ermanno; Mazzeo, Antonino; Mazzocca, Nicola
A hardware accelerator for data classification within the sensing infrastructure
2014 Barbareschi, Mario; Battista, Ermanno; Mazzocca, Nicola; Venkatesan, Sridhar
Secure distribution infrastructure for hardware digital contents
2014 Cilardo, Alessandro; Barbareschi, Mario; Mazzeo, Antonino
Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective
2015 Barbareschi, Mario; Del Prete, Salvatore; Gargiulo, Francesco; Mazzeo, Antonino; Sansone, Carlo
Partial FPGA bitstream encryption enabling hardware DRM in mobile environments
2016 Barbareschi, Mario; Cilardo, Alessandro; Mazzeo, Antonino
An IP Core Remote Anonymous Activation Protocol
2018 Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro
Approximate Decision Tree-Based Multiple Classifier Systems
2017 Barbareschi, Mario; Papa, Cristina; Sansone, Carlo
A Proposal for the Secure Activation and Licensing of FPGA IP Cores
2017 Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro
An FPGA-based Smart Classifier for Decision Support Systems
2014 Amato, Flora; Barbareschi, Mario; Casola, Valentina; Mazzeo, Antonino
Towards Automatic Generation of Hardware Classifiers
2013 Amato, Flora; Barbareschi, Mario; Casola, Valentina; Mazzeo, Antonino; Romano, Sara
On the adoption of FPGA for protecting cyber physical infrastructures
2013 Barbareschi, Mario; Battista, Ermanno; Casola, Valentina; Mazzeo, Antonino; Mazzocca, Nicola
Outperforming Image Segmentation by Exploiting Approximate K-Means Algorithms
2017 Amato, Flora; Barbareschi, Mario; Cozzolino, Giovanni; Mazzeo, Antonino; Mazzocca, Nicola; Tammaro, Antonio
Synthesis of finite state machines on memristor crossbars
2018 Ferrandino, ; and Traiola, U.; and Barbareschi, M.; and Mazzeo, M.; and Fišer, A.; and Bosio, P.
XbarGen: A memristor based boolean logic synthesis tool
2016 Traiola, ; and Barbareschi, M.; and Mazzeo, M.; and Bosio, A.
Adopting decision tree based policy enforcement mechanism to protect reconfigurable devices
2016 Barbareschi, Mario; and Mazzeo, M.; and Miranda, A.
Automatic design space exploration of approximate algorithms for big data applications
2016 Barbareschi, Mario; and Iannucci, M.; and Mazzeo, F.
Designing an SRAM PUF-based secret extractor for resource-constrained devices
2017 Barbareschi, Mario; and Bagnasco, M.; and Amelino, P.; and Mazzeo, D.
An extendible design exploration tool for supporting approximate computing techniques
2016 Barbareschi, Mario; and Iannucci, M.; and Mazzeo, F.
How to manage keys and reconfiguration in WSNs exploiting SRAM based PUFs
2016 Amelino, ; and Barbareschi, D.; and Battista, M.; and Mazzeo, E.
| Titolo | Tipologia | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|---|
| Network traffic analysis using android on a hybrid computing architecture | 2.1 Contributo in volume (Capitolo o Saggio) | 2013 | Barbareschi, Mario; Mazzeo, Antonino; Vespoli, Antonino | |
| Testing 90 nm microcontroller SRAM PUF quality | 4.1 Articoli in Atti di convegno | 2015 | Barbareschi, Mario; Battista, Ermanno; Mazzeo, Antonino; Mazzocca, Nicola | |
| A hardware accelerator for data classification within the sensing infrastructure | 4.1 Articoli in Atti di convegno | 2014 | Barbareschi, Mario; Battista, Ermanno; Mazzocca, Nicola; Venkatesan, Sridhar | |
| Secure distribution infrastructure for hardware digital contents | 1.1 Articolo in rivista | 2014 | Cilardo, Alessandro; Barbareschi, Mario; Mazzeo, Antonino | |
| Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective | 4.1 Articoli in Atti di convegno | 2015 | Barbareschi, Mario; Del Prete, Salvatore; Gargiulo, Francesco; Mazzeo, Antonino; Sansone, Carlo | |
| Partial FPGA bitstream encryption enabling hardware DRM in mobile environments | 4.1 Articoli in Atti di convegno | 2016 | Barbareschi, Mario; Cilardo, Alessandro; Mazzeo, Antonino | |
| An IP Core Remote Anonymous Activation Protocol | 1.1 Articolo in rivista | 2018 | Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro | |
| Approximate Decision Tree-Based Multiple Classifier Systems | 2.1 Contributo in volume (Capitolo o Saggio) | 2017 | Barbareschi, Mario; Papa, Cristina; Sansone, Carlo | |
| A Proposal for the Secure Activation and Licensing of FPGA IP Cores | 4.1 Articoli in Atti di convegno | 2017 | Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro | |
| An FPGA-based Smart Classifier for Decision Support Systems | 2.1 Contributo in volume (Capitolo o Saggio) | 2014 | Amato, Flora; Barbareschi, Mario; Casola, Valentina; Mazzeo, Antonino | |
| Towards Automatic Generation of Hardware Classifiers | 2.1 Contributo in volume (Capitolo o Saggio) | 2013 | Amato, Flora; Barbareschi, Mario; Casola, Valentina; Mazzeo, Antonino; Romano, Sara | |
| On the adoption of FPGA for protecting cyber physical infrastructures | 4.1 Articoli in Atti di convegno | 2013 | Barbareschi, Mario; Battista, Ermanno; Casola, Valentina; Mazzeo, Antonino; Mazzocca, Nicola | |
| Outperforming Image Segmentation by Exploiting Approximate K-Means Algorithms | 2.1 Contributo in volume (Capitolo o Saggio) | 2017 | Amato, Flora; Barbareschi, Mario; Cozzolino, Giovanni; Mazzeo, Antonino; Mazzocca, Nicola; Tammaro, Antonio | |
| Synthesis of finite state machines on memristor crossbars | 4.1 Articoli in Atti di convegno | 2018 | Ferrandino, ; and Traiola, U.; and Barbareschi, M.; and Mazzeo, M.; and Fišer, A.; and Bosio, P. | |
| XbarGen: A memristor based boolean logic synthesis tool | 4.1 Articoli in Atti di convegno | 2016 | Traiola, ; and Barbareschi, M.; and Mazzeo, M.; and Bosio, A. | |
| Adopting decision tree based policy enforcement mechanism to protect reconfigurable devices | 4.1 Articoli in Atti di convegno | 2016 | Barbareschi, Mario; and Mazzeo, M.; and Miranda, A. | |
| Automatic design space exploration of approximate algorithms for big data applications | 4.1 Articoli in Atti di convegno | 2016 | Barbareschi, Mario; and Iannucci, M.; and Mazzeo, F. | |
| Designing an SRAM PUF-based secret extractor for resource-constrained devices | 1.1 Articolo in rivista | 2017 | Barbareschi, Mario; and Bagnasco, M.; and Amelino, P.; and Mazzeo, D. | |
| An extendible design exploration tool for supporting approximate computing techniques | 4.1 Articoli in Atti di convegno | 2016 | Barbareschi, Mario; and Iannucci, M.; and Mazzeo, F. | |
| How to manage keys and reconfiguration in WSNs exploiting SRAM based PUFs | 2.1 Contributo in volume (Capitolo o Saggio) | 2016 | Amelino, ; and Barbareschi, D.; and Battista, M.; and Mazzeo, E. |