PETRA, NICOLA
PETRA, NICOLA
DIPARTIMENTO DI INGEGNERIA ELETTRICA E TECNOLOGIE DELL'INFORMAZIONE
High Speed Galois Fields GF(2^m) Multipliers
2007 Petra, Nicola; DE CARO, Davide; Strollo, ANTONIO GIUSEPPE MARIA
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS
2004 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
Constrained Piecewise Polynomial Approximation for Hardware Implementation of Elementary Functions
2008 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola; Napoli, Ettore; Garofalo, Valeria
Digital Synthesizer/Mixer with Hybrid CORDIC Multiplier Architecture: Error Analysis and Optimization
2009 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Low error Truncated Multipliers for DSP applications
2008 Garofalo, Valeria; Petra, Nicola; DE CARO, Davide; Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore
Code Compression for ARM7 Embedded Systems
2007 Garofalo, Valeria; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
NORA based TDC in 90 nm CMOS
2013 Petra, Nicola; S., Russo; DE CARO, Davide; Napoli, Ettore; Barbarino, Giancarlo; Strollo, ANTONIO GIUSEPPE MARIA
An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS
2004 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
A 430 MHz, 280 mW processor for the conversion of Cartesian to polar coordinates in 0.25um CMOS
2008 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola
A high-speed and high-accuracy interpolator for digital modems
2008 Petra, Nicola; A. N., WILLSON JR
An FFT-based coprocessor for real time video processing
2012 Lopez, Giorgio; Petra, Nicola; DE CARO, Davide; Napoli, Ettore
FPGA architecture for real time video segmentation and denoising
2012 Genovese, Mariangela; Petra, Nicola; DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA
Dual-Field Arithmetic Core for High-Performance Cryptographic Operations
2008 Cilardo, Alessandro; R., Piscitelli; Mazzocca, Nicola; Petra, Nicola
A 630MHz Direct Digital Frequency Synthesizer with 90dBc SFDR in 0.25um CMOS
2006 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A 380MHz, 150mW Direct Digital Synthesizer/Mixer in 0.25um CMOS
2006 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
High Speed Differential Resistor Ladder for A/D Converters
2010 DE CARO, Davide; Coppola, Marino; Petra, Nicola; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Garofalo, Valeria
Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies
2012 T., Addabbo; DE CARO, Davide; A., Fort; Petra, Nicola; S., Rocchi; V., Vignoli
A 1.27GHz, All-Digital Spread Spectrum Clock Generator-Synthesizer in 65nm CMOS
2010 DE CARO, Davide; C. A., Romani; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA; C., Parrella
A Novel Truncated Squarer with Linear Compensation Function
2010 Garofalo, Valeria; Coppola, Marino; DE CARO, Davide; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method
2008 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Titolo | Tipologia | Data di pubblicazione | Autore(i) | File |
---|---|---|---|---|
High Speed Galois Fields GF(2^m) Multipliers | 4.1 Articoli in Atti di convegno | 2007 | Petra, Nicola; DE CARO, Davide; Strollo, ANTONIO GIUSEPPE MARIA | |
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS | 4.1 Articoli in Atti di convegno | 2004 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola | |
Constrained Piecewise Polynomial Approximation for Hardware Implementation of Elementary Functions | 4.1 Articoli in Atti di convegno | 2008 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola; Napoli, Ettore; Garofalo, Valeria | |
Digital Synthesizer/Mixer with Hybrid CORDIC Multiplier Architecture: Error Analysis and Optimization | 1.1 Articolo in rivista | 2009 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
Low error Truncated Multipliers for DSP applications | 4.1 Articoli in Atti di convegno | 2008 | Garofalo, Valeria; Petra, Nicola; DE CARO, Davide; Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore | |
Code Compression for ARM7 Embedded Systems | 4.1 Articoli in Atti di convegno | 2007 | Garofalo, Valeria; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
NORA based TDC in 90 nm CMOS | 1.1 Articolo in rivista | 2013 | Petra, Nicola; S., Russo; DE CARO, Davide; Napoli, Ettore; Barbarino, Giancarlo; Strollo, ANTONIO GIUSEPPE MARIA | |
An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2004 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola | |
A 430 MHz, 280 mW processor for the conversion of Cartesian to polar coordinates in 0.25um CMOS | 1.1 Articolo in rivista | 2008 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola | |
A high-speed and high-accuracy interpolator for digital modems | 4.1 Articoli in Atti di convegno | 2008 | Petra, Nicola; A. N., WILLSON JR | |
An FFT-based coprocessor for real time video processing | 4.1 Articoli in Atti di convegno | 2012 | Lopez, Giorgio; Petra, Nicola; DE CARO, Davide; Napoli, Ettore | |
FPGA architecture for real time video segmentation and denoising | 4.1 Articoli in Atti di convegno | 2012 | Genovese, Mariangela; Petra, Nicola; DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA | |
Dual-Field Arithmetic Core for High-Performance Cryptographic Operations | 4.1 Articoli in Atti di convegno | 2008 | Cilardo, Alessandro; R., Piscitelli; Mazzocca, Nicola; Petra, Nicola | |
A 630MHz Direct Digital Frequency Synthesizer with 90dBc SFDR in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2006 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
A 380MHz, 150mW Direct Digital Synthesizer/Mixer in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2006 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
High Speed Differential Resistor Ladder for A/D Converters | 4.1 Articoli in Atti di convegno | 2010 | DE CARO, Davide; Coppola, Marino; Petra, Nicola; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Garofalo, Valeria | |
Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies | 1.1 Articolo in rivista | 2012 | T., Addabbo; DE CARO, Davide; A., Fort; Petra, Nicola; S., Rocchi; V., Vignoli | |
A 1.27GHz, All-Digital Spread Spectrum Clock Generator-Synthesizer in 65nm CMOS | 1.1 Articolo in rivista | 2010 | DE CARO, Davide; C. A., Romani; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA; C., Parrella | |
A Novel Truncated Squarer with Linear Compensation Function | 4.1 Articoli in Atti di convegno | 2010 | Garofalo, Valeria; Coppola, Marino; DE CARO, Davide; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method | 1.1 Articolo in rivista | 2008 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA |