We present the parallel implementation of a synthetic aperture radar (SAR) processor algorithm based on a particular two-dimensional Fourier transform code. The computer architecture consists of a toroidal net with transputers on each node. The excellent performance and flexibility of the net is discussed and shown in a number of graphs.

An Efficient Sar Parallel Processor / Franceschetti, Giorgio; Mazzeo, Antonino; Mazzocca, Nicola; Pascazio, Vito; G., Schirinzi. - In: IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS. - ISSN 0018-9251. - STAMPA. - 27:(1991), pp. 343-353. [10.1109/7.78308]

An Efficient Sar Parallel Processor

FRANCESCHETTI, GIORGIO;MAZZEO, ANTONINO;MAZZOCCA, NICOLA;PASCAZIO, VITO;
1991

Abstract

We present the parallel implementation of a synthetic aperture radar (SAR) processor algorithm based on a particular two-dimensional Fourier transform code. The computer architecture consists of a toroidal net with transputers on each node. The excellent performance and flexibility of the net is discussed and shown in a number of graphs.
1991
An Efficient Sar Parallel Processor / Franceschetti, Giorgio; Mazzeo, Antonino; Mazzocca, Nicola; Pascazio, Vito; G., Schirinzi. - In: IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS. - ISSN 0018-9251. - STAMPA. - 27:(1991), pp. 343-353. [10.1109/7.78308]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11588/467238
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