In this work, we describe the implementation of an accumulator-based ADPLL on a Virtex 5. The ADPLL includes a Time-to-Digital Converter (TDC) that is based on two delay-lines and an oscillator. The resolution of the TDC is 1ns. The Digitally-Controlled-Oscillator (DCO) in the ADPPLL is implemented with a fixed- frequency oscillator and a digitally-controlled frequency divider. The period of the DCO can be set with a precision of 5ns. A digital filter based on finite difference equations is included in the ADPLL. Equation-based models are reported for all the building-blocks of the ADPLL. Simulated and measured step responses of the PLL are compared.
Modelling and Implementation of an Accumulator-based ADPLL on a Virtex-5 / F., Brandonisio; D., Melinn; M. P., Kennedy; D., Guerra; M., Deviato; Napoli, Ettore. - STAMPA. - 1:(2012), pp. 18-24. (Intervento presentato al convegno IET Irish Signals and Systems Conference (ISSC 2012) tenutosi a Maynooth, Ireland nel 28th - 29th June 2013).
Modelling and Implementation of an Accumulator-based ADPLL on a Virtex-5
NAPOLI, ETTORE
2012
Abstract
In this work, we describe the implementation of an accumulator-based ADPLL on a Virtex 5. The ADPLL includes a Time-to-Digital Converter (TDC) that is based on two delay-lines and an oscillator. The resolution of the TDC is 1ns. The Digitally-Controlled-Oscillator (DCO) in the ADPPLL is implemented with a fixed- frequency oscillator and a digitally-controlled frequency divider. The period of the DCO can be set with a precision of 5ns. A digital filter based on finite difference equations is included in the ADPLL. Equation-based models are reported for all the building-blocks of the ADPLL. Simulated and measured step responses of the PLL are compared.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
