In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. The main goal of this paper is to perform a Design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. The results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. The presented results can also be considered as a reference (benchmarking) for comparing future work.
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture / Barbareschi, M.; Bosio, A.; O'Connor, I.; Fiser, P.; Traiola, M.. - (2022), pp. 38-43. (Intervento presentato al convegno 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022 tenutosi a cze nel 2022) [10.1109/DDECS54261.2022.9770145].
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture
Barbareschi M.;
2022
Abstract
In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. The main goal of this paper is to perform a Design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. The results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. The presented results can also be considered as a reference (benchmarking) for comparing future work.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
