Two high-speed direct digital frequency synthesizers (DDFS) have been fabricated in CMOS 0.25 μm technology. Both DDFS provides two quadrature phase 12 bit outputs with a spectral purity of 80 dBc. The first circuit reaches a maximum operating frequency of 600 MHz. The second circuit operates up to 480 MHz clock speed while dissipating only 72 μW/MHz. The proposed circuits employ an innovative high-speed architecture for sine and cosine functions approximation, based on a hardware-effective linear interpolation approach name as "dual-slope".
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS / Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola. - STAMPA. - (2004), pp. 163-166. (Intervento presentato al convegno IEEE Custom Integrated Circuits Conference tenutosi a Orlando, USA nel Oct. 2004) [10.1109/CICC.2004.1358764].
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS
STROLLO, ANTONIO GIUSEPPE MARIA;DE CARO, Davide;NAPOLI, ETTORE;PETRA, NICOLA
2004
Abstract
Two high-speed direct digital frequency synthesizers (DDFS) have been fabricated in CMOS 0.25 μm technology. Both DDFS provides two quadrature phase 12 bit outputs with a spectral purity of 80 dBc. The first circuit reaches a maximum operating frequency of 600 MHz. The second circuit operates up to 480 MHz clock speed while dissipating only 72 μW/MHz. The proposed circuits employ an innovative high-speed architecture for sine and cosine functions approximation, based on a hardware-effective linear interpolation approach name as "dual-slope".I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
