This manuscript introduces a compact electrothermal model for SiC power MOSFETs that can be easily scaled to devices of different voltage ratings. The model is implemented as a subcircuit containing mainly SPICE native components. Both the static and dynamic performance can be tuned by adjusting a small set of parameters. The model is validated on 1.7 kV-60 A-rated devices.
An Electrothermal Compact Model for SiC MOSFETs Based on SPICE Primitives with Improved Description of the JFET Resistance / Borghese, A.; Riccio, M.; Maresca, L.; Breglio, G.; Irace, A.. - 2022-:(2022), pp. 37-40. (Intervento presentato al convegno 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 tenutosi a can nel 2022) [10.1109/ISPSD49238.2022.9813598].
An Electrothermal Compact Model for SiC MOSFETs Based on SPICE Primitives with Improved Description of the JFET Resistance
Borghese A.;Riccio M.;Maresca L.;Breglio G.;Irace A.
2022
Abstract
This manuscript introduces a compact electrothermal model for SiC power MOSFETs that can be easily scaled to devices of different voltage ratings. The model is implemented as a subcircuit containing mainly SPICE native components. Both the static and dynamic performance can be tuned by adjusting a small set of parameters. The model is validated on 1.7 kV-60 A-rated devices.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
